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careers@nuvacore.aiCPU Security Verification Engineer
Full-time · Multiple Levels · US / Canada / India
Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. We are seeking Verification Engineers at multiple levels — from Senior Engineer to Principal level — to help prove the security of the Nuvacore CPU. As part of the design verification (DV) team, you will help drive security verification — isolation, privilege, and resistance to side-channel and speculative attacks — building the stimulus, models, and checkers that find security bugs long before silicon, working shoulder-to-shoulder with security architects and RTL design.
THE ROLE
- Plan & Strategy: Drive the verification scope, threat model, strategy, and test plans for CPU security — isolation, privilege boundaries, secure state, and resistance to side-channel and speculative-execution attacks.
- Environment Setup: Build, maintain, and scale robust verification environments — stimulus, checkers, models, and coverage — that exercise isolation, access control, and attack scenarios end to end.
- Test & Debug: Generate directed and random tests in assembly, C, or random instruction sequences (RIS) to model side-channel and speculative-execution attacks and prove robustness.
- Coverage Closure: Define the coverage space, write functional coverage monitors, and analyze metrics to prove the security test plan is complete.
- Cross-functional Collaboration: Partner with security architects and RTL teams to root-cause failures, drive design fixes, and support emulation, FPGA, and silicon bring-up.
REQUIREMENTS — MUST TO HAVE
- Degree in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.
- 15+ years (Principal) or 4+ years (Senior Engineer) of design-verification experience, ideally on a CPU or complex digital design.
- Strong knowledge of CPU micro-architecture and hardware-security concepts — isolation, privilege, and side-channel/speculative-execution attacks.
- Hands-on functional verification: test plans, testbenches, checkers, and coverage.
- Proficiency in C/C++/Rust and/or SystemVerilog, plus a scripting language (Python; Perl a plus).
- Experience writing and debugging tests in assembly for CPU verification.
REQUIREMENTS — NICE TO HAVE
- Hardware security verification — isolation, secure boot, access control, or confidential computing (trusted execution environments).
- Side-channel analysis and speculative-execution (transient-execution) attack modeling.
- Security formal verification or theorem proving.
- Threat modeling and security-requirements verification.
- Constrained-random verification and coverage-driven closure.
- Emulation/FPGA and silicon bring-up and debug (waveforms, trace).