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careers@nuvacore.aiCPU Telemetry & Observability Development Lead
Full-time • US I Canada / UK / India or Hybrid • SW + Tech Lead
Nuvacore is building ground-up CPU silicon for next-generation compute workloads. We are seeking an experienced technical leader to head our CPU Telemetry and Observability organization, responsible for the architecture, development, and deployment of telemetry systems enabling deep visibility into next-generation processor platforms. This role leads a team developing infrastructure that captures, aggregates, and analyzes on-chip telemetry, performance counters, debug signals, and runtime system metrics across CPU, memory, and platform subsystems. These capabilities are critical for silicon bring-up, performance optimization, reliability monitoring, and large-scale production observability. You will work at the intersection of CPU architecture, silicon design, firmware, operating systems, cloud infrastructure, and data analytics, enabling engineering teams to extract actionable insights from complex hardware systems.
THE ROLE
Technical Leadership
- Define and drive the software architecture for next-generation CPU telemetry and observability infrastructure and toolset.
- Lead development of telemetry systems enabling real-time visibility into CPU microarchitecture behavior, memory performance, and platform interactions.
- Oversee instrumentation and telemetry frameworks including:
- On-chip performance counters
- Hardware telemetry registers
- Trace and event collection systems
- Runtime system telemetry infrastructure
- Enable first-silicon bring-up and platform validation through advanced telemetry capture and analysis capabilities.
- Diagnose complex performance, power, and reliability issues using large-scale telemetry data.
Telemetry Architecture & Data Infrastructure
- Design scalable telemetry pipelines supporting collection, aggregation, storage, and analysis of high-volume system telemetry.
- Define instrumentation strategies for CPU, SoC, and platform subsystems.
- Ensure telemetry infrastructure supports debugging, performance tuning, and reliability monitoring across development and production environments.
Team Leadership
- Build, lead, and mentor a high-performance telemetry and observability engineering team.
- Establish development processes, technical roadmaps, and delivery milestones.
- Collaborate with architecture, firmware, OS, validation, and data platform teams globally.
Cross-Functional Collaboration
- Partner with CPU architecture, silicon design, firmware, kernel, validation, and cloud infrastructure teams to enable end-to-end platform observability.
- Provide telemetry capabilities that support performance analysis, power management, reliability engineering, and production monitoring.
WHAT YOU’LL OWN
- Architecture and development of end-to-end telemetry infrastructure, including on-chip instrumentation, firmware telemetry interfaces, kernel integration, and large-scale data collection pipelines.
- Telemetry readiness for silicon bring-up, performance characterization, and production monitoring of Nuvacore processor platforms.
- Technical ownership of telemetry strategy spanning CPU microarchitecture instrumentation, system observability, analytics infrastructure, and performance insights.
REQUIREMENTS — MUST HAVE
- Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or Data Engineering, with 15+ years of experience in telemetry, performance analysis, system observability, or platform software development and 5+ years managing engineering teams.
Deep expertise in:
- CPU microarchitecture observability and performance instrumentation
- Hardware performance counters and telemetry registers
- System performance analysis and bottleneck identification
- Low-level software development (C/C++, Python, or similar)
- Data infrastructure and large-scale telemetry analysis
Additional experience
- Hands-on experience building telemetry systems across firmware, kernel, and user-space layers.
- Extensive experience analyzing CPU performance, memory hierarchy behavior, and platform interactions.
- Proven ability to develop telemetry and analysis tools using modern development environments and toolchains.
- Experience working with large-scale telemetry datasets and analytics pipelines.
- Deep Linux experience including kernel instrumentation, performance counters, tracing frameworks, and system observability tools.
Platform experience
- Experience working with CPU architectures such as x86, ARM64, or RISC-V.
- Ability to interpret low-level system metrics including CPU pipelines, cache behavior, memory latency, and interconnect traffic.
Communication
- Demonstrated ability to communicate complex performance and telemetry insights clearly through reports, dashboards, and presentations to engineering leadership.
REQUIREMENTS — nice to HAVE
Hardware instrumentation
Experience with:
- CPU trace systems
- Hardware telemetry fabrics
- Performance monitoring units (PMUs) and tools for data collection
Observability frameworks
Experience with tools such as:
- eBPF
- perf
- Distributed telemetry pipelines and observability platforms
Platform experience
- Hands-on experience with server, client, or accelerator-class CPU platforms.
- Prior principal-level role in performance analysis, observability, or telemetry architecture within a semiconductor or hyperscale infrastructure company.
WHAT SUCCESS LOOKS LIKE
- Comprehensive telemetry coverage enabling rapid silicon bring-up and debugging.
- Deep insights into CPU performance, power behavior, and system interactions.
- Scalable telemetry infrastructure supporting large-scale validation and production deployments.
- A high-performing telemetry engineering team delivering actionable insights to architecture and platform teams.