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careers@nuvacore.aiCompetitive Power Performance (Lead & ICs)
Full-time · US / Canada / UK / India or Hybrid · ICs / Lead
Nuvacore is building ground-up CPU silicon for next-generation compute workloads. As our Competitive Power Performance Lead, you will own the end-to-end understanding of where the competition stands today and where it will be tomorrow — combining rigorous lab-based power and performance measurement with deep microarchitectural reverse engineering to ensure every Nuvacore design decision is grounded in an accurate, current picture of the competitive landscape.
THE ROLE
- Instrument competitor systems to accurately measure power across all key components — CPU core, SoC, DRAM, voltage regulators, and platform losses — producing reliable, repeatable power breakdowns tied to specific workloads and operating points.
- Run industry standard benchmarks (SPEC CPU, GeekBench, Speedometer, Cinebench, SPEC JBB, DCperf) on competitive hardware and Nuvacore targets; own the methodology to ensure results are comparable, reproducible, and correctly interpreted.
- Write targeted microbenchmarks to characterize the microarchitectural strengths and weaknesses of competitor CPUs — probing memory hierarchy (cache sizes, latencies, bandwidth), branch predictor behavior, prefetcher aggressiveness, out-of-order window depth, and execution throughput.
- Synthesize power and performance measurements into forward-looking competitive projections — estimating where key competitors will land at future process nodes and architectural generations, and communicating clearly how Nuvacore compares.
- Maintain a rigorous, version-controlled repository of all competitive data, benchmark results, power measurements, microbenchmark findings, and projections; ensure it is accessible, well-documented, and trusted across the organization.
- Collaborate with CPU architects and performance modelers to translate competitive insights into actionable microarchitectural decisions — identifying gaps to close and strengths to exploit in the Nuvacore design.
- Communicate findings clearly to technical and non-technical audiences; produce crisp, well-structured reports and presentations for engineering leadership and executive stakeholders.
- Mentor junior engineers on benchmarking methodology, lab instrumentation, power measurement techniques, and competitive analysis rigor.
WHAT YOU'LL OWN
- Power measurement lab: System instrumentation and methodology for accurate per-component power breakdown across CPU, SoC, DRAM, and regulators.
- Competitive benchmark suite: Full benchmark library across industry standard suites and custom microbenchmarks targeting competitor microarchitectural characteristics.
- Competitive projections: Forward-looking power and performance roadmap estimates for key competitors — updated each competitive generation.
- Competitive data repository: Version-controlled, well-documented store of all measurements, results, analyses, and projections — the authoritative competitive reference for the company.
REQUIREMENTS — MUST HAVE
- MS in Computer Architecture, Computer Engineering, Electrical Engineering, or related field (PhD preferred).
- 20+ years (Lead) or 8+ years (ICs) in CPU or SoC power and performance analysis, competitive benchmarking, or microarchitecture engineering.
- Hands-on experience instrumenting competitor systems to measure power at the component level — CPU, SoC, DRAM, VR losses — using bench equipment (oscilloscopes, precision current sensors, power analyzers) and custom shunt instrumentation.
- Deep experience running and interpreting industry standard benchmarks: SPEC CPU, GeekBench, Speedometer, Cinebench, SPEC JBB, DCperf, and equivalent client and server suites.
- Proven ability to write microbenchmarks that reverse-engineer competitor CPU microarchitecture — characterizing memory hierarchy, branch predictor behavior, prefetchers, out-of-order window, and execution units.
- Strong understanding of CPU pipeline microarchitecture and how architectural choices manifest in measurable performance and power signatures.
- Experience developing forward-looking competitive projections based on process node trends, publicly available architectural data, and empirical measurement extrapolation.
- Strong scripting skills in Python and Perl for data collection, analysis automation, and result visualization.
- Strong Linux experience — comfortable running benchmarks, scripting workflows, profiling workloads, and debugging system-level issues across Linux-based hardware platforms.
- Experience in x86, ARM64, or RISC-V ISA; ability to read and analyze compiler-generated and hand-written assembly.
- Demonstrated ability to communicate complex technical findings clearly — written reports, presentations, and verbal briefings to diverse audiences including engineering leadership.
REQUIREMENTS — nice to HAVE
- Experience with PMU-based workload characterization (Linux perf, VTune, uProf) to correlate measured performance with microarchitectural events on competitor silicon.
- Familiarity with thermal measurement and platform-level power management (DVFS, power states, turbo behavior) and their impact on sustained performance.
- Experience with cycle-accurate CPU performance simulators to cross-validate competitive hypotheses against modeled behavior.
- Prior principal-level role at a CPU, SoC, or competitive intelligence team at a semiconductor company.